Cisco 30 VIP Especificaciones descargar pdf (Pagina 4)

4 VIP-FE-TX Installation and Conﬁguration

Versatile Interface Processor Functions

Note The VIP port adapters themselves do not support OIR, nor are they FRUs.

The VIP uses a Reduced Instructions Set Computing (RISC), Mips 4600 processor for high

performance, and has an internal operating frequency of 100 megahertz (MHz) and a 50-MHz

system bus interface. The VIP has 8 megabytes (MB) of dynamic random access memory (DRAM)

as the default DRAM configuration.

Figure 1 shows a VIP-FE-TX. The VIP ﬁrmware (microcode), which contains card-speciﬁc

software instructions, resides in a Flash memory device in socket location U17. For pinouts, refer to

the section “FE-TX Port Adapter Receptacles, Cables, and Pinouts” on page 33. Single in-line

memory modules contain the DRAM. You can install VIPs in any available interface processor slots

in your Cisco 7000 series or Cisco 7500 series router.

Figure 1 VIP with One FE-TX Port Adapter (Horizontal Orientation Shown)

Note In the Cisco 7000, Cisco 7507 and Cisco 7513 chassis, the VIP is installed vertically. In the

Cisco 7010 and Cisco 7505 chassis, the VIP is installed horizontally. Port adapters have a handle

attached, but this handle is not shown to allow a full view of the detail on the port adapter’s faceplate.

H4709

DRAM

SIMMs

FE-TX in

port adapter

slot 0

Port adapter blank

in port adapter

slot 1

Port adapter

handles not shown

Microcode

Flash U17

Bus connector

MII

LINK

RJ45

FAST ETHERNET

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Cisco 30 VIP Especificaciones Pagina 4